A thermal driven genetic algorithm for three dimensional network-on-chip systems

3D network-on-chip (NoC) has emerged as a cutting edge technology that provides better performance by combining features of NoC and die-stacking IC technology. It is able to push the limits of Moores law by increasing the density of components in a chip resulting in higher functionality. The increasing packing density and power consumption of systems-on-chip (SoC) have made thermal effects one of the most important concern of chip designers. Increase in temperature degrades the performance, life time, reliability, and increases the maintenance cost. Addition of more layers in the z dimension has increased the length of heat conduction path and power density per unit area. Besides, the cooling capabilities of the 3D stacks are much less because of the adiabatic inter-layer materials. To ensure thermal safety, we propose a novel algorithm that uses Multi-Objective Genetic Algorithm to minimize the peak temperature of each layer in 3D NoC. Resistors model is used for thermal modeling. Three different architectures is considered in our experimental work and the results show a decrease in the peak temperature per layer. Experimental results have been validated with a well known thermal model named 3D ICE.